Semiconductors form the basis of modern electronics. Possessing physical properties that can be selectively modified and controlled between conduction and insulation, semiconductors are essential in most modern electrical devices (e.g., computers, cellular phones, photovoltaic cells, etc.). Group IV semiconductors generally refer to those first four elements in the fourth column of the periodic table: carbon, silicon, germanium and tin.
The ability to deposit semiconductor materials using non-traditional semiconductor technologies such as printing may offer a way to simplify the fabrication process and hence reduce the cost of many modern electrical devices (e.g., computers, cellular phones, photovoltaic cells, etc.). Like pigment in paint, these semiconductor materials are generally formed as microscopic particles, such as nanoparticles, and temporarily suspended in a colloidal dispersion that may be later deposited on a substrate.
Nanoparticles are generally particles with at least one dimension less than 100 nm. In comparison to a bulk material (>100 nm) which tends to have constant physical properties regardless of its size (e.g., melting temperature, boiling temperature, density, conductivity, etc.), nanoparticles may have physical properties that are size dependent, such as a lower sintering temperature.
The nanoparticles may be produced by a variety of techniques such as evaporation (S. Ijima, Jap. J Appl. Phys. 26, 357 (1987)), gas phase pyrolysis (K. A Littau, P. J. Szajowski, A. J. Muller, A. R. Kortan, L. E. Brus, J Phys. Chem. 97, 1224 (1993)), gas phase photolysis (J. M. Jasinski and F. K. LeGoues, Chem. Mater. 3, 989 (1991), electrochemical etching (V. Petrova-Koch et al., Appl. Phys. Lett. 61, 943 (1992)), plasma decomposition of silanes and polysilanes (H. Takagi et al, Appl. Phys. Lett. 56, 2379 (1990)), high pressure liquid phase reduction-oxidation reaction (J. R. Heath, Science 258, 1131 (1992)), etc.
One such advantage is that Group IV semiconductor nanoparticle materials offer the potential of high volume, low-cost processing for the ready deposition of a variety of Group IV nanoparticle inks on a range of substrate materials. After printing, a suitable fabrication method of a Group IV semiconductor device, such as a range of optoelectric devices, including photovoltaic devices must be selected that is compatible with the overall goal of high volume processing.
For example, a solar cell converts solar energy directly to DC (direct current) electric energy. Generally configured as a photodiode, a solar cell permits light to penetrate into the vicinity of metal contacts such that a generated charge carrier (electrons or holes (a lack of electrons)) may be extracted as current. And like most other diodes, photodiodes are formed by combining p-type and n-type semiconductors to form a junction. After the addition of passivation and anti-reflection coatings, a layer acting as back surface field and metal contacts (fingers and busbar on the emitter, and pads on the back of the absorber) may be added in order to extract generated charge. Emitter dopant concentration, in particular, must be optimized for both carrier collection and for contact with the metal electrodes.
In general, a low concentration of dopant atoms within an emitter region will result in low recombination (thus higher solar cell efficiencies (the percentage of sunlight that is converted to electricity)), but poor electrical contact to metal electrodes. Conversely, a high concentration of dopant atoms will result in high recombination (reducing solar cell efficiency), but low resistance ohmic contacts to metal electrodes. Often, in order to reduce manufacturing costs, a single dopant diffusion is generally used to form an emitter, with a doping concentration selected as a compromise between reducing recombination and improving ohmic contact formation. Consequently, potential solar cell efficiency is reduced.
One solution is the use of a dual-doped or selective emitter. A selective emitter uses a first lightly doped region optimized for low recombination, and a second heavily doped region pattern (of the same dopant type) optimized for low resistance ohmic contact formation. Selective emitters are commonly formed with either multiple diffusion steps in conjunction with diffusion blocking layers, or with the use of multiple dopant sources. Commonly, the principal variation between such regions is a difference in dopant atomic concentration, and there is generally no visible contrast between the highly and lightly doped regions. Consequently, the alignment of a metal contact pattern onto a previously deposited highly doped region pattern is a large technical challenge.
For example, the general lack of a visible contrast makes it difficult to monitor the accuracy of metal contact pattern placement or to detect potential axial and/or angular misalignment.
Likewise, in a back-contact solar cell, a set of counter-doped inter-digitated highly doped patterns with superimposed metal contacts are configured on the back side of the solar cell. In addition, the back surface may also be lightly doped with one of the dopants used in the inter-digitated highly doped patterns to form a BSF (back surface field). As with selective emitters, the visual boundaries between highly doped and lightly doped regions are difficult to determine. Consequently, metal contact pattern alignment for this cell structure is also problematic.
Common alignment methods are substrate edge alignment or alignment to fiducial marks. Fiducial marks (or fiducials) allow a pattern deposition device, usually a screen printer or inkjet printer, to deposit the desired pattern relative to specific coordinates on the solar cell. These fiducial marks are placed in an independent step before patterning, thus requiring extra tools and processing steps. Importantly, tolerance errors at each fiducial alignment step are additive. That is, first the selective emitter pattern is defined relative to the fiducials within a certain tolerance followed by the metal deposition also positioned relative to the fiducials with a different tolerance. To ensure alignment of the metal contacts to the selective emitter these tolerances are added and either the selective emitter pattern is designed larger than the metal pattern to ensure no metal touches the lower doped regions or a degree of misalignment is tolerated. In each case a sacrifice in device efficiency potential is accepted due to higher contact resistance when metal is contacting a lower doped region or due to lower current when the selective emitter pattern is designed with large features to ensure metal only contacts highly doped regions. Tighter alignment tolerances enable higher efficiencies.
In general, the aligned placement of two patterns by means of edge alignment requires that the substrate orientation be kept constant (to minimize errors caused by variations in substrate sizes) between subsequent deposition steps, which may restrict and complicate substrate handling. Furthermore, if different deposition tools are used for subsequent layers, the vision systems generally need to base all calculations on exactly the same locations on a given substrate, which may be unrealistic in high throughput manufacturing (generally over 1500 substrates/hour). Finally, alignment accuracy is low due to substrate geometries being non-ideal and edges poorly defined.
In view of the foregoing, there is a desire to provide methods of aligning a set of patterns on a silicon substrate.